Critères de l'offre
Métiers :
- Digital Modelling Engineer
- + 2 métiers
Expérience min :
- 6 à 10 ans
Secteur :
- Food industry
Compétences :
- English
- French
- DSP
- Synopsys
- Design
- + 3 compétences
Lieux :
- Neuchâtel
Conditions :
- Permanent contract
- Full Time
L'entreprise : Michael Page
Join our client's cutting-edge team in their R&D Hub in Neuchatel, where they develop miniature, highly reliable, low-power devices that power critical health and connectivity solutions like hearing aids and glucose monitors. As a Verification IC Digital Design (Sr Staff/Principal), you'll ensure robust, reliable performance in their next-gen mixed-signal products through expert UVM-based verification.#UVM Verification
#Mixed-Signal Design
#MCU DSP low-power
#Formal Verification
#System Verification
#SoC Verification
#Semiconductor Architect
#Battery-Powered Applications
#Chip-Level Verification
#System Engineering for Medical Devices
Description du poste
Main Missions of the Verification IC Design (Sr Staff/Principal)
- Architect and verify connected, low-power devices, translating customer needs into technical roadmaps.
- Collaborate with design, applications, and marketing teams to maximize IP reuse and ensure our products meet industry needs.
- Drive verification methods and introduce formal verification practices for enhanced reliability.
Description du profil
The successful Verification IC Digital Design (Sr Staff/Principal) should have part or entire set of skills mentioned below :
- 7+ years in mixed-signal semiconductor design and verification with strong UVM experience.
- Proven expertise in formal and dynamic verification, preferably at a chip level.
- Strong technical communication and cross-functional collaboration skills.
- Communication in English, French is a nice to have.
- Knowledge of MCU and DSP-based systems for low-power applications.
- Strong familiarity with UVM-based methods, ideally with experience on a full chip rather than isolated IP blocks.
- Familiarity with both formal (static) and dynamic verification, with a willingness to help implement formal methods.
Technical Skills must/nice to have :
- Languages: Verilog, SystemVerilog,
- Verification Methodology: UVM (Universal Verification Methodology)
- Verification Types: Formal (Static) and Dynamic Verification
- Low-Power Design Concepts: Expertise in MCU/DSP-based systems with power efficiency
- Software Tools: Simulation tools (Cadence, Synopsys, Mentor Graphics), IP reuse tools, DSP/mixed-signal design software
- Knowledge Areas: Mixed-Signal Design, MCU/DSP architectures, IP Reuse
- Industry-Specific: Medical and industrial application knowledge
- Soft Skills: Strong communication skills, business acumen, customer engagement experience